﻿<?xml version="1.0" encoding="utf-8" standalone="yes"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:trackback="http://madskills.com/public/xml/rss/module/trackback/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/"><channel><title>BlogJava-肥虫/solotim-随笔分类-Verilog</title><link>http://www.blogjava.net/solotim/category/21595.html</link><description>给我一杯Java...</description><language>zh-cn</language><lastBuildDate>Tue, 15 May 2007 03:38:38 GMT</lastBuildDate><pubDate>Tue, 15 May 2007 03:38:38 GMT</pubDate><ttl>60</ttl><item><title>verilog中clock不使用negedge的三个原因</title><link>http://www.blogjava.net/solotim/archive/2007/04/23/113000.html</link><dc:creator>肥虫</dc:creator><author>肥虫</author><pubDate>Mon, 23 Apr 2007 09:40:00 GMT</pubDate><guid>http://www.blogjava.net/solotim/archive/2007/04/23/113000.html</guid><wfw:comment>http://www.blogjava.net/solotim/comments/113000.html</wfw:comment><comments>http://www.blogjava.net/solotim/archive/2007/04/23/113000.html#Feedback</comments><slash:comments>0</slash:comments><wfw:commentRss>http://www.blogjava.net/solotim/comments/commentRss/113000.html</wfw:commentRss><trackback:ping>http://www.blogjava.net/solotim/services/trackbacks/113000.html</trackback:ping><description><![CDATA[&nbsp;&nbsp;&nbsp;&nbsp; 摘要: clk为什么要用posedge，而不用negedge呢？&nbsp;&nbsp;<a href='http://www.blogjava.net/solotim/archive/2007/04/23/113000.html'>阅读全文</a><img src ="http://www.blogjava.net/solotim/aggbug/113000.html" width = "1" height = "1" /><br><br><div align=right><a style="text-decoration:none;" href="http://www.blogjava.net/solotim/" target="_blank">肥虫</a> 2007-04-23 17:40 <a href="http://www.blogjava.net/solotim/archive/2007/04/23/113000.html#Feedback" target="_blank" style="text-decoration:none;">发表评论</a></div>]]></description></item></channel></rss>